Combining Operational Semantics, Logic Programming and Literate Programming in the Specification and Animation of the Verilog Hardware Description Language

نویسنده

  • Jonathan P. Bowen
چکیده

An operational semantics for a significant subset of the Verilog Hardware Description Language (HDL) has been developed. An unusual aspect of the semantics is that it was formulated as a Prolog logic program. This allows the possibility of simulating the semantics. In addition, a literate programming style has been used, so the semantics can be processed by the LTEX document preparation system with minimal and fully automated preprocessing. Bringing together the paradigms of operational semantics, logic programming and literate programming in this manner has proved a great aid in a number of ways. It has helped improve the understanding of the semantics, in the formalization of semantic aspects left informal in the original mathematical formulation of the semantics, and in the maintenance of the formal semantics and its associated informal description. Civilization advances by extending the number of important operations which we can perform without thinking about them. Introduction to Mathematics (1911) ch. 5 Alfred North Whitehead (1861–1947)

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

An Animatable Operational Semantics of the Verilog Hardware Description Language

An operational semantics of a significant subset of the Verilog Hardware Description Language (HDL) is presented. The semantics is encoded using the logic programming language Prolog in a literate programming style. This allows the associated documentation to be maintained in step with the semantics, and the printed version to be presented in a standard mathematical operational semantics style....

متن کامل

Mapping Statecharts to Verilog for Hardware/Software Co-specification

Hardware-Software co-specification is a critical phase in co-design. Our co-specification process starts with a high level graphical description in Statecharts and ends with an equivalent parallel composition of hardware and software descriptions in Verilog. In this paper, we investigate the Statecharts formalism by providing it a formal syntax and a compositional operational semantics. After t...

متن کامل

Animating the Semantics of VERILOG using Prolog

Eclogue:1 The logic programming language Prolog is used to provide a rapid-prototype simulator for the VERILOG Hardware Description Language (HDL). The simulator is based on an operational semantics of a significant subset of the language. Using this approach allows the exploration of sometimes subtle behaviours of parallel programs and the possibility of rapid changes or additions to the seman...

متن کامل

Towards a Formal Semantics of Verilog Using Duration Calculus

1 I n t r o d u c t i o n Modern hardware design typically uses hardware description languages to express designs at various levels of abstraction. A hardware description language is a high level programming language, with the usual programming constructs such as assignments, conditionals and iterations, and appropriate extensions for real-time, concurrency and data structures suitable for mode...

متن کامل

A Higher-Level Language for Hardware Synthesis

We describe SAFL+: a call-by-value, parallel language in the style of ML which combines imperative, concurrent and functional programming. Synchronous channels allow communication between parallel threads and π-calculus style channel passing is provided. SAFL+ is designed for hardware description and synthesis; a silicon compiler, translating SAFL+ into RTL-Verilog, has been implemented. By par...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2000